The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 1995

Filed:

Sep. 30, 1993
Applicant:
Inventors:

Akihiro Sawada, Osaka, JP;

Hiroyuki Yamauchi, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 13 ; 365200 ; 326 21 ;
Abstract

In a semiconductor memory having a redundant circuit, a plurality of first normal cells and a plurality of first spare cells are connected to a first pair of data lines, and a plurality of second normal cells and a plurality of second spare cells are connected to a second pair of data lines. Both pairs of data lines are connected to an output data line through a selecting amplifier. A normal cell is selected based on a combination of NGWL1, NGWL2, . . . with BLK1, BLK2, both NGWL1, NGWL2, . . . and BLK1, BLK2 being supplied from a decoder, and a spare cell is selected based on a combination of the BLK1, BLK2 supplied from the decoder with SGWL1, SGWL2, . . . supplied from a redundancy judging circuit. A second spare cell is selected when a first normal cell is selected, and a first spare cell is selected when a second normal cell is selected. Only at the time when a spare address is entered, one of the SGWL1, SGWL 2, . . . is raised. This not only achieves a high-speed reading and a high defect-relief rate, but also reduces the current consumption and the chip area.


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