The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 28, 1995
Filed:
Jul. 26, 1993
Tetsuro Motoyama, San Jose, CA (US);
Banky Mor, San Jose, CA (US);
Gregorio Rodriquez, Union City, CA (US);
Chan Kim, Fremont, CA (US);
Ricoh Co., Ltd., San Jose, CA (US);
Ricoh Corporation, San Jose, CA (US);
Abstract
A system for debugging an application program includes a debugging execution unit operated under an operating-system-free environment. The debugging execution unit includes a communication channel, a target processor unit for executing the application program and a first debugging program, and an interrupt vector swapper. The first debugging program includes a first set of input/output procedures for handling debugging communications over the communication channel, and the application program includes a second set of input/output procedures for handling communications over the communication channel associated with execution of the application program. Interrupt signals are generated when the target processor unit receives communications from the host processor unit. The target processor unit communicates with a host processor unit via the communication channel both when executing the application program and when executing the first debugging program. A first set of interrupt vector entries link interrupt signals generated during execution of the first debugging program to a first set of destination addresses. A second set of interrupt vector entries link interrupt signals generated during execution of the application program to a second set of destination addresses. A vector controller maps interrupt signals via the first set of interrupt vector entries during execution of the first debugging program, and maps interrupt signals via the second set of interrupt vector entries during execution of the application program.