The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 28, 1995
Filed:
Jul. 02, 1993
Tetsuya Nagai, Yokohama, JP;
Katsuyuki Yamazaki, Tsurugashima, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Kokusai Denshin Denwa Co., Ltd., Tokyo, JP;
Abstract
A cell delay addition circuit can easily feed any desired delay to each of input cells in a communication apparatus or the like for asynchronous transfer mode operation. A time stamp is obtained for an inputted cell based on a sum of a delay amount from a delay amount producing circuit and the current time produced by a clock circuit. The time stamp and the input cell are written in a cell buffer. On the reading side, a comparator reads out a time stamp from the cell buffer and when the comparator detects that the current time tm is equal to or greater than the time stamp, the comparator produces a cell output enable signal ce so that the cell buffer produces the cell.