The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 1995

Filed:

May. 22, 1992
Applicant:
Inventors:

Carlo J Evangelisti, Jefferson Valley, NY (US);

Leon Lumelsky, Stamford, CT (US);

Mark J Pavicic, Fargo, ND (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395131 ; 395141 ; 395163 ;
Abstract

SIMD computer architecture is used in conjunction with a host processor and coordinate processor to render quality, three-dimensional, anti-aliased shaded color images into the frame buffer of a video display system. The method includes a parallel algorithm for rendering an important graphic primitive for accomplishing the production of a smoothly shaded color three-dimensional triangle with anti-aliased edges. By taking advantage of the SIMD architecture and said parallel algorithm, the very time consuming pixel by pixel computations are broken down for parallel execution. A single coordinate processor computes and transmits an overall triangle record which is essentially the same for all blocks of pixels within a given bounding box which box in turn surrounds each triangle. The individual pixel data is produced by a group of M.times.N pixel processors and stored in the frame buffer in a series of repetitive steps wherein each step corresponds to the processing of an M.times.N block of pixels within the bounding box of the triangle. Thus, each pixel processor performs the same operation, modifying its computations in accordance with triangle data received from the coordinate processor and positional data unique to its own sequential connectivity to the frame buffer, thus allowing parallel access to the frame buffer.


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