The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 21, 1995
Filed:
Nov. 06, 1992
Philip W Yee, Los Altos, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A folder circuit maps an analog input voltage to an analog output voltage in accordance with a folding function having at least one folding point. The folder circuit includes a power supply node and at least one input differential stage. Each input differential stage has a first input node to which is applied the input voltage, a second input node to which is applied a first reference voltage corresponding to that stage's folding point, and two differential output nodes. A resistive network is connected between the power supply node and the two differential output nodes, and a current source draws a predefined current from each input differential stage. An output network generates an analog output voltage as a function of the highest voltages on the differential output nodes of all the stages of the folder circuit. A current injection circuit provides a level-shifting current to each input differential stage through the two differential output nodes. A clamping circuit connected between the power supply node and each of the differential output nodes prevents saturation of the transistors in the input differential stages. A set of feedback paths in the resistive network interconnect each differential output node with neighboring ones of the differential output nodes to increase the gain of the folder circuit near each of the folding points.