The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 1995

Filed:

Aug. 28, 1992
Applicant:
Inventor:

Satoshi Nonaka, Yokohama, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 83 ; 326121 ; 326 26 ;
Abstract

A output circuit of a semiconductor integrated circuit comprises a prebuffer circuit, an output buffer circuit comprising first and second output buffer circuits for receiving the output of said prebuffer circuit, said first output buffer circuit comprising a CMOS inverter having its input terminal connected to the output terminal of said output buffer circuit and its output terminal connected to an output terminal, said second output buffer circuit comprising MOS transistors for electrically charging or discharging said output terminal and capacitances, the output of said prebuffer circuit being supplied to the gates of the MOS transistors through the respective capacitances. Such an output circuit can effectively reduce simultaneous switching noise without deteriorating its load driving capability.


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Nonaka, Satoshi. (1995). Output circuit of a semiconductor integrated circuit (U.S. Patent No. 5391939). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5391939

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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