Branch isolation circuit for cascode voltage switch logic

Abstract

Cascode voltage switch (CVS) logic circuits include a CMOS logic tree having multiple logic branches and a bipolar, branch isolation transistor. Each logic branch of the logic tree changes state between a logic '1' and a logic '0', with a state change being manifested as a charging or discharging of the logic branch. The bipolar transistor comprises a multiple-emitter bipolar transistor wherein each emitter is electrically coupled to a different logic branch of the CMOS logic tree. A precharge circuit, coupled to the logic tree via the bipolar transistor, provides charge to an output of the CVS circuit prior to operation of said logic tree. The logic branches of the logic tree are charged and discharged substantially independently of one another thereby enhancing speed of the combinatorial logic circuit. Various circuit modifications and generalizations are also discussed.