Multiplexer for at least two independently operating signal sources

Abstract

In an arrangement for combining at least two source signals to a multiplex signal, source signals from independently operating source modules are transmitted to a multiplex module in which they are combined into the multiplex signal in a predetermined manner. An orderly operation of the modules is ensured in that each source module includes at least a memory, a write counter and a read counter. The counters are arranged to operate independently of each other and to generate the addresses when the data are being written into and read from the memory. The arrangement includes a memory for storing the frame-structured source signals at the start of a new frame starting at a predetermined initial address of the memory and for marking the memory address of the end of the frame with a marking bit. The arrangement also includes read logic for reading the source signals from the memory of the source modules under control of a clock signal supplied by the multiplex module, and for transmitting the source signals to the multiplex module. Each source module is arranged to supply a reset signal after the marked address has been read during reading of a frame. The arrangement is adapted to set the read counters of all source modules to the predetermined initial address when the reset signal is eliminated.