The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 24, 1995
Filed:
Apr. 09, 1992
Katsumi Oishi, Tokyo, JP;
Masahisa Takano, Tokyo, JP;
Seikosha Co., Ltd., Tokyo, JP;
Abstract
A set parameter memory and a time recorder enable parameter setting to be readily effected in compliance with an individual user's demand. The set parameter memory has a memory circuit for storing set parameters for time supervision, and a terminal unit for transmission and/or reception of the set parameters. A time recorder has a connector unit which enables a terminal unit of a set parameter memory to be detachably connected thereto, a second memory circuit for storing set parameters, and a control circuit for writing set parameters stored in the set parameter memory to the second memory circuit. The time recorder may also be constructed with a connector unit which enables a terminal unit of a set parameter memory to be detachably connected thereto, a second memory circuit for storing set parameters, an operation unit for setting transmission and/or reception of set parameters, and a control circuit that effects control such that, when transmission and/or reception of the set parameters is set at the operation unit, the control circuit allows transfer of the set parameters between the set parameter memory and the second memory circuit, and upon completion of the transmission and/or reception of the set parameters, the control circuit inhibits the transfer of the set parameters between the set parameter memory and the second memory circuit.