The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 1995

Filed:

Jul. 30, 1993
Applicant:
Inventor:

Kazuhiro Sakashita, Itami, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; G06F / ;
U.S. Cl.
CPC ...
437 51 ; 326 38 ; 326 39 ;
Abstract

By the disclosed apparatus, the method and the electronic circuit device employing the disclosed apparatus, a configurable semiconductor integrated circuit device is manufactured in a reduced time. A regular logic input/output terminal (6) of a configurable semiconductor integrated circuit device (FPGA) (1) is connected to a data processing apparatus (52) through an interface circuit (51). On a magnetic disk (55), logic function specifying basic data are stored which define basic logic functions which are attainable with circuit diagram data and by the FPGA (1). The data processing apparatus (52) generates logic function specifying final data based on the circuit diagram data while utilizing basic logic operations of the FPGA (1) which is loaded with a logic. Since the basic logic operations of the logic-loaded FPGA (1) are used in generating the logic function specifying final data, the FPGA (1) is manufactured in a reduced time.


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