The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 17, 1995

Filed:

Mar. 04, 1993
Applicant:
Inventor:

Tadashi Shibuya, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
36518901 ; 395100 ; 395115 ; 395400 ; 395425 ;
Abstract

A memory circuit includes a RAM having a memory cell section and a bit manipulation section for controlling a writing of a bit unit to the memory cell section. The RAM is configured to be able to be read and written at different timings by at least two devices. A register stores mask bits for controlling an operation of the bit manipulation section for each bit of data written to the memory cell section. In the bit manipulation operation, a content of a memory cell within the memory cell corresponding to an inactive bit in the register is rewritten by the bit manipulation section, but a content of a memory cell within the memory cell corresponding to the active bit in the register is maintained as it is.


Find Patent Forward Citations

Shibuya, Tadashi. (1995). Memory circuit capable of executing a bit manipulation at a high speed (U.S. Patent No. 5383154). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5383154

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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