Field effect thin film transistor and static-type semiconductor memory

Abstract

A structure of a thin film transistor capable of reducing the power consumption in the waiting state and stabilizing the data holding characteristic in application of the thin film transistor as a load transistor in a memory cell in a CMOS-type SRAM is provided. A gate electrode is formed of a polycrystalline silicon film on a substrate having an insulating property. A gate insulating film is formed on the gate electrode. A polycrystalline silicon film is formed on the gate electrode with the gate insulating film interposed therebetween. Source/drain regions including a region of low concentration and a region of high concentration are formed in one and another regions of the polycrystalline silicon film separated by the gate electrode. Thus, the thin film transistor is formed. The thin film transistor is applied to p-channel MOS transistors serving as load transistors in a memory cell of a CMOS-type SRAM. P-channel MOS transistors are connected to n-channel MOS transistors serving as driver transistors in the memory cell. The n-channel MOS transistors are formed in a p-type well region, and the p-channel MOS transistors are formed on an interlayer insulating film on the n-channel MOS transistors.