The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 10, 1995
Filed:
Mar. 30, 1993
Katsunori Noguchi, Kanagawa, JP;
Tetsuya Kondo, Kanagawa, JP;
Sony Corporation, Tokyo, JP;
Abstract
A CCD delay line comprises of first, second and third transfer regions which are formed in a semiconductor substrate. Output portions of the second and third transfer regions are connected to a differential amplifier. The output terminal of the differential amplifier is connected to input sources of the first and second transfer regions. The third transfer region is able to carry at most 30% of maximum amount of charge which the first and second transfer regions can carry. A signal is supplied from a signal source through a clamp circuit to an input gate electrode of the first transfer region. Bias changing means independently change one of an input bias voltage supplied to the input gate electrode of the first transfer region and a reference bias voltage supplied to an input gate electrode of the second transfer region.