The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 1995

Filed:

Apr. 28, 1992
Applicant:
Inventor:

Masashi Hirano, Tokyo, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
3241581 ; 324 731 ;
Abstract

A high-speed LSI chip to be tested and evaluated by a readily available low-speed semiconductor tester and evaluation equipment. The high-speed LSI includes within the chip a clock supply circuit for supplying a high speed clock and an internal circuit, connected to the clock supply circuit, in which the high-speed clock is supplied from the clock supply circuit. A method for testing and evaluating the LSI chip. The method includes the steps of: supplying a high-speed clock generated from a clock supply circuit which is located within the semiconductor chip; and sending back a result of a semiconductor chip in response to the high-speed clock to the tester/evaluation equipment to be evaluated.


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