The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 03, 1995
Filed:
Jan. 13, 1994
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
A plurality of bit line signal IO lines L1, /L1 . . . Ln and /Ln are arranged on a memory cell array. These bit line signal IO lines are arranged to cross respective bit lines BL1, /BL1, . . . BLn and /BLn, and are connected to the corresponding bit lines, respectively. Each bit line signal IO line has an end extended to an end, in a direction perpendicular to the bit line, of a memory cell array, and is coupled at the end to a bit line peripheral circuit. Although bit line peripheral circuits could be arranged only at upper and lower ends of the bit lines in the prior art, the bit line peripheral circuits can be arranged also at the ends of the bit line signal IO lines in the invention. This can increase a degree of freedom in a layout for the bit line peripheral circuits, and thus the bit line peripheral circuits can be dispersedly arranged in a larger area.