The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 03, 1995

Filed:

Mar. 30, 1994
Applicant:
Inventors:

Nobuyuki Kokubo, Hyogo, JP;

Kazuya Ikeda, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
327 77 ; 327 78 ; 327546 ;
Abstract

A power supply voltage level detecting circuit includes a reference voltage generating circuit for generating a constant reference voltage independent of a power supply voltage, a to-be-compared voltage generating circuit for generating a voltage to be compared changing dependent upon the power supply voltage, a current mirror type differentially amplifying circuit for amplifying differentially the reference voltage and the voltage to be compared, and a determining circuit for generating a level detecting signal indicating whether or not the power supply voltage has attained a predetermined level in accordance with an output of the differentially amplifying circuit. The to-be-compared voltage generating circuit generates the voltage to be compared by dropping the power supply voltage using the resistance division or the forward voltage drop of diode. Since a signal corresponding to the power supply voltage level is provided from the differentially amplifying circuit, it is possible to detect the power supply voltage level reliably without being affected by variation of an input logic threshold voltage of an inverter circuit due to the manufacturing process.


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