The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 03, 1995

Filed:

Apr. 19, 1993
Applicant:
Inventors:

Dale M Brown, Schenectady, NY (US);

Mario Ghezzo, Ballston Lake, NY (US);

Assignee:

General Electric Company, Schenectady, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 40 ; 437100 ; 437911 ;
Abstract

A silicon carbide (SiC) junction field effect transistor (JFET) device is fabricated upon a substrate layer, such as a p type conductivity SiC substrate, using ion implantation for the source and drain areas. A SiC p type conductivity layer is epitaxially grown on the substrate. A SiC n type conductivity layer is formed by ion implantation or epitaxial deposition upon the p type layer. The contacting surfaces of the p and n type layers form a junction. A p+ type gate area supported by the n type layer is formed either by the process of ion implantation or the process of depositing and patterning a second p type layer. The source and drain areas are heavily doped to n+ type conductivity by implanting donor ions in the n type layer.


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