The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 1994

Filed:

Mar. 03, 1993
Applicant:
Inventor:

Jean-Francois Debroux, St Etienne de St Geoirs, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F / ;
U.S. Cl.
CPC ...
330271 ; 330288 ;
Abstract

A push-pull output stage for electronic integrated circuits includes two NPN transistors (Q1, Q2) connected in series between two supply terminals. The output (S) is the junction point of the transistors. A third NPN transistor (Q3) has its base and its collector connected respectively to the base and to the collector of Q1. Two current flow arms (R1, Q4 and R2, Q5) are formed, one to establish a current depending on the potential of the emitter of Q3 and the other to establish a current depending on the potential of the emitter of Q1. The arms are mounted in a current mirror arrangement, the second arm tending to copy the current of the first arm; the current mirror generating a current output (S2) representing a difference between the current set up in the second arm and the current copied from the first arm. This current output is used to control the conduction of the second transistor (Q2). Thus, there is obtained an output stage using exclusively NPN transistors and having, at the same time, greater linearity than that of prior art devices.


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