The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 1994

Filed:

Jan. 21, 1994
Applicant:
Inventors:

Yasuo Satoh, Ohme, JP;

Takuji Itoh, Ohme, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364490 ; 364489 ; 364488 ;
Abstract

A wiring processing method for determining a wiring route for connecting terminals includes a step of dividing a wirable region into a plurality of rectangular regions in a virtual region corresponding to a chip, a step of searching a rectangular region for connecting the terminals to be wired by tracing mutually crossings rectangular regions, and a step of determining a detailed wiring route inside the searched rectangular region. Since the search is conducted by use of the rectangular region as a unit, high speed search can be made.


Find Patent Forward Citations

Satoh, Yasuo. (1994). Wiring routes in a plurality of wiring layers (U.S. Patent No. 5375069). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5375069

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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