The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 1994

Filed:

Jan. 15, 1993
Applicant:
Inventors:

Toshihiko Nakauchi, Hadano, JP;

Masato Hirai, Hadano, JP;

Masami Kurata, Hadano, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L / ; H03L / ; H03L / ; H03L / ;
U.S. Cl.
CPC ...
331 / ; 331 14 ; 331 18 ; 331 25 ; 331 49 ;
Abstract

A method and apparatus for controlling the phase of a system clock, in which one of a first clock signal and a second clock signal is selected and output to a system as a system clock signal, the first clock signal being generated by a frequency synthesizer synchronized with an external clock signal supplied from a reference clock signal oscillator provided externally of the system, and the second clock signal being supplied from another reference clock signal oscillator provided internally of the system, and the phases of the first and second clock signals are controlled, prior to switching between the first and second clock signals and supplying the switched clock signal to the system as the system clock signal. The switching is delayed for a period while there is a phase shift between the first and second clock signal , when the system clock signal is switched between the first and second clock signal.


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