The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 1994

Filed:

Apr. 05, 1993
Applicant:
Inventors:

James W Nicholes, Gilbert, AZ (US);

Douglas D Smith, Mesa, AZ (US);

David P DiMarco, Hillsboro, OR (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
326106 ; 326122 ;
Abstract

A configurable decode circuit (11) having a plurality of inputs (12), a clock input (13), an output (14), and an output (16) is described. The configurable decode circuit (11) is a nor type decoder configurable to different address widths. A latch (17) stores the decode results. A bias circuit (29) enables the configurable decode circuit (11) starting a decode cycle. A differential input stage is coupled between the latch (17) and bias circuit (29). One side of the differential input stage comprises a plurality of transistors (23) coupled in parallel. Each control electrode of the plurality of transistors (23) is coupled to a respective input of inputs (12). The other side of the differential input stage comprises a transistor (28) coupled between the latch (17) and the bias circuit (29). A control electrode of the transistor (28) is coupled to common first electrodes of the plurality of transistors (23).


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