The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 13, 1994
Filed:
Nov. 16, 1992
Gene Lee Armstrong, II, Garland, TX (US);
Benchmarq Microelectronics, Inc., Carrollton, TX (US);
Abstract
A three-state input circuit operable to sense three separate logic states on an input pad (10) is operable to sense whether the current is sourced to the pad from a positive source or sinked from the pad to a negative source to provide two logic states. A third logic state is provided when it is determined that current is not being sourced to or sinked from the pad (10). A current source (36) is connected from a positive rail (14) through the source/drain path of an N-channel transistor (40) to the pad (10). This provides a sink current comparator function. A source current comparator function is provided by a current source (42) that is connected to the pad (10) through the source/drain path of a P-channel transistor (46) and to a negative voltage rail (18). The transistor (40) has a first bias voltage V.sub.B1 connected to the gate thereof and the transistor (46) has a second bias voltage V.sub.B2 connected to the gate thereof. When the pad (10) is connected to the negative rail (18) to sink current from the pad (10), current is conducted through the source/drain path of transistor (40). This is sensed by a decision logic circuit (32) to determine the first logic state. When current is sourced to the pad (10) from the positive rail (14), the transistor (46) turns on and current is passed through the current source (42) to represent a second logic state. When current is not sourced to or sinked from the pad (10) from an external positive or negative voltage source, both transistor (40) and transistor (46) are off, representing a third logic state.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile