Method and apparatus for clock skew reduction through remote delay

Abstract

A remote delay regulator circuit measures the effects of intrinsic propagation delays experienced by a system clock signal propagating through an extended clock distribution path that encompasses a clock repeater chip, a module transmission network and a clock distribution network of an integrated circuit (IC) chip associated with a clock repeater chip. Circuits of the remote delay regulator are contained on the repeater chip and on the associated IC chip. Delay measurement of the remote IC clock distribution network is provided by sensing the clock signal at the beginning of the network using a BEFORE sense tap and at the end of the network using an AFTER sense tap. The BEFORE and AFTER sense taps are routed to a signal generation circuit on the repeater chip where measurement signals are generated that define the beginning and end of a measurement cycle. A clock delay path circuit on the repeater chip contains the logic circuitry required to measure and compensate for the intrinsic propagation delays of the repeater chip, the transmission network and the IC chip. The logic circuitry includes a measurement latch circuit and a measurement delay line having tapped outputs coupled to the latch circuit.