The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 1994

Filed:

Dec. 23, 1993
Applicant:
Inventor:

Oh B Kwon, Bubaleub, Ichonkun, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
341136 ; 341118 ; 341144 ;
Abstract

A digital/analog converter circuit comprising first to third transistors, the first transistor having a gate terminal for inputting a constant voltage and one side terminal for inputting a power source voltage, the second transistor having a gate terminal for inputting a first digital signal, one side terminal connected to the other side terminal of the first transistor and the other side terminal forming a first output terminal, the third transistor having a gate terminal for inputting a second digital signal of the opposite phase to that of the first digital signal, one side terminal connected to the other side terminal of the first transistor and the other side terminal forming a second output terminal. A buffer part buffers a digital input signal to provide the second digital signal. An inverter part inverts the digital input signal to provide the first digital signal. The inverter part includes a first compensator for removing an input transfer time difference between the second and third transistors in response to the output of the buffer part. A second compensator removes floating electrons from the inverter part in response to the digital input signal. A third compensator compensates for a poor '0' logical state transfer capability of the buffer part in response to the output of the inverter part.


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