The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 1994

Filed:

Jul. 15, 1992
Applicant:
Inventors:

Jacky Pardillos, Plaisir, FR;

Paul Ravaux, Les Clayes Sous Bois, FR;

Assignee:

Bull S.A., Paris, FR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395325 ; 395275 ; 364239 ; 3642423 ; 3642393 ; 364D / ; 364939 ; 3649392 ; 36494061 ; 364D / ;
Abstract

An universal device (GPUI) for coupling a computer bus (PSB) to a controller (DEA) of a group of peripherals connected to one another by a specific link (FDDI) to which the controller is physically connected, includes a microprocessor (CPU) associated with a set of memories and an interface (IHAC, IHAD) for linkage with the controller (DEA) assuring the transfer of the data of the frames and of control blocks. The universal coupling device comprises a double-port random-access buffer memory (VRAM) connected by way of a first bus (B.sub.1) to the interface (IHAD) and by way of a second bus (B.sub.2) to the computer bus via a specific interface of the computer (MPC). Transfer of the data between the linking interface (IHAC, IHAD) and the double-port memory, on the one hand, and between the latter (VRAM) and the computer bus (PSB) on the other, is organized by a microprocessor (CPU), as is the conversion of control blocks used on the computer bus into those used in the link.


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