The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 1994

Filed:

Jun. 22, 1993
Applicant:
Inventors:

Edison Fong, Sunnyvale, CA (US);

Smaragda Denton, Belmont, CA (US);

Nghiem Nguyen, Mountain View, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
341101 ; 341100 ;
Abstract

A novel serial data communication interface architecture is provided having two modes of operation that are accessed through a chip select signal in combination with a successive approximation registers signal (SARS). Once the internal data conversion begins, the chip select signal may change to any signal state without interrupting the conversion process. Serial interface data output and SARS lines are tri-stated during conversion, while the chip select signal is high. This allows data input, data output, and SARS lines to serve other purposes during conversion. If chip select signal is high at the falling edge of SARS, converted data DO bits are then provided to an internal output register. However, DO data are not immediately routed to the output. Clocking of the output data does not resume until at the first transition to low of chip select signal after the falling edge of SARS. The next conversion is not initiated until the second transition of chip select back to low after the falling edge of SARS signaling the end of conversion.


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