The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 22, 1994
Filed:
Aug. 10, 1992
William S Blocher, Tucson, AZ (US);
Bruce M Cassidy, Boca Raton, FL (US);
James O Groves, Jr, Endicott, NY (US);
Randhir S Malik, Lexington, KY (US);
Stephen F Newton, Endicott, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
In critically continuous boost converters used to achieve high power factor and low input current harmonic distortion, a power FET is driven by a pulse generator whose on time is essentially constant over a single line cycle. Off time is terminated when current in the inductor falls to zero and the voltage on the side of the inductor not connected to the input voltage is less that the input voltage. A delay causes turn on to occur at the minimum of the voltage ring to minimize turn on switching losses. At voltages when the input voltage is less than one half of the output voltage part of the on time, turn on occurs with negative current flowing through the FET power switch and the inductor. Part of the turn on time is used to charge the inductor current back to zero before energy can begin to flow back into the output of the converter. A correction circuit is provided which extends the on time as a function of the input and output voltage to avoid dead time around the zero voltage crossover of the sinusoidal input voltage which when rectified provides the input voltage to the converter.