Voltage reference ladder having improved linearity

Abstract

A voltage circuit, which provides a plurality of reference voltages, is formed from a resistive line having a first and second ends. The resistive line also includes a multiplicity of reference voltage tap points, and first and second sense points. The sense points are offset from the ends of the resistive line, and thus at least a plurality of the reference voltage tap points are located between the first sense point and the first end of the resistive line and another plurality of the reference voltage tap points are located between the second sense point and the second end of the resistive line. A plurality of other functional circuits, such as comparator circuits, are connected to various ones of the reference voltage tap points. A force and sense circuit, external to the integrated circuit in which the voltage reference circuit is located, has sense terminals connected to the sense points of the resistive line, and first and second force terminals respectively connected to the first and second ends of the resistive line. The force and sense circuit also includes a voltage generator that impresses first and second voltage potentials upon the first and second force terminals until the voltages on the first and second sense terminals match predefined first and second voltage levels. By using sense points offset from the resistive line's end points, the average error of the reference voltages at the resistive line's tap points is significantly reduced.