Sampling frequency converter

Abstract

A sampling frequency converter includes an oversampling circuit for oversampling an input sample train, a Random Access Memory (RAM), a write control circuit for writing oversampled data in the RAM with a clock synchronized with the oversampled data, a sampling frequency ratio measuring circuit for measuring a frequency ratio of a sampling frequency of the input sample train and a sampling frequency of an output sample train, a read control circuit for reading from the RAM the oversampled data used for obtaining interpolation data at two points before and after an output sample value which realizes the measured sampling frequency ratio by a polynomial interpolation, a polynomial interpolation circuit for obtaining the interpolation data at the two points by the polynomial interpolation on the basis of the oversampled data read from the RAM by the read control circuit, and a linear interpolation circuit for linear-interpolating between the polynomial interpolation data at the two points and thereby obtaining the output sample value realizing the sampling frequency ratio. The sampling frequency ratio measuring circuit may include a counter and a count outputting circuit which measures a count for plural word periods of the output sample and outputs this count as the measured value of the sampling frequency ratio.