The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 1994
Filed:
Oct. 22, 1992
Tsuneaki Kudou, Yokohama, JP;
Kabushika Kaisha Toshiba, Kawasaki, JP;
Abstract
A first bus wiring line to which a plurality of first circuits each having the same bit range are connected, a second bus wiring line to which a plurality of second circuits each having a bit range smaller than that of each of the first circuits are connected, and a bus interface circuit having a buffer circuit connected between a portion of the first bus wiring line and the second bus wiring line and a dummy buffer circuit connected to the remaining portion of the first bus wiring line are arranged in an integrated circuit. Fox this reason, when a plurality of circuits having different bit ranges are connected to the bus wiring lines, the loads of the bus wiring lines can be made uniform, and a data transfer operation through the bus lines can be performed at a high speed. The operating frequency of a clock can be increased, and the performance of the system can be improved.