Single device under test (dut) port common reference/matching impedance

Abstract

Disclosed is a Device Under Test (DUT) fault detection and location circuit. A first circuit port is connected to the DUT for fault detection and location. A signal source for generating a series of signals across the operating frequency range of the DUT is connected to a second circuit port. A divider divides each signal generated by the source so as to provide first and second fractions of the signal, the second fraction passing to the device under test. A fault detection section provides a DUT fault detection voltage for each respective frequency. The circuit also has a branch including an impedance section and a fault location section. The branch receives the first fraction, and the fault location section provides a DUT fault location voltage for each respective frequency. The fault detection section is connected between the impedance section and the DUT such that each fault detection voltage it provides indicates whether a predetermined relationship exists between the impedance of the impedance section and the impedance presented by the DUT. In addition to serving as a reference impedance for fault detection, the impedance section serves to match the fault location section which performs fault location measurements to the impedance presented to the fault location section by the divider.