The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 25, 1994
Filed:
May. 04, 1992
Gregory Djaja, Tempe, AZ (US);
Timothy J Jennings, Chandler, AZ (US);
Douglas W Schucker, Mesa, AZ (US);
Frederic B Shapiro, Mesa, AZ (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A method for optimization of delay times in a digital circuit. The method comprises selecting a logic gate (12), and constructing a model (35) which predicts the delay time (27) of the logic gate (12). Varying the parameters which control the model to more accurately predict the delay time (48). Summing the delay time (48) due to each logic gate (12) which comprises the signal path. Repeating the method for each signal path within the digital circuit until all signal paths are computed. Modifying the digital circuit based on the calculated delay times (48) so as to better satisfy a predetermined measurement criteria.