The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 1994
Filed:
Dec. 22, 1992
Para K Segaram, Campbell, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A waveshaping circuit, which includes a phase-lock-loop stage, an input logic stage, a delayed input logic stage, and a weighted current sum stage, shapes and filters a data signal to be transmitted onto the twisted-pair media of a local area network. The phase-lock-loop stage generates a series of incrementally-delayed timing signals in response to an oscillator signal. The input logic stage generates a plurality of pairs of logic signals by periodically latching a logic state and an inverse logic state of the data signal in response to the incrementally-delayed timing signals. The delayed input logic stage generates a plurality of pairs of delayed logic signals by periodically latching a logic state and an inverse logic state of an inverse data signal in response to the incrementally-delayed timing signals. The weighted current sum stage incrementally generates both an output data signal and a complementary output data signal in response to both the plurality of logic signals and the plurality of delayed logic signals.