The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 1994

Filed:

Nov. 30, 1992
Applicant:
Inventor:

Shigeru Morita, Fujisawa, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
257316 ; 257322 ; 257374 ;
Abstract

The present invention comprises a groove formed in a semiconductor substrate, a buried element isolation region formed in the groove, source and drain diffusion regions formed inside the buried element isolation region, an electrode wiring layer connected the buried element isolation region across the diffusion regions and constituted by a two-layered structure consisting of a control gate and a floating gate, and a side-wall diffusion region which extends along the groove, is in contact with the source and drain diffusion regions, and is formed at a position corresponding to at least the electrode wiring layer. As a result, the write characteristic of a non-volatile memory can be improved, and at the same time, the non-volatile memory can be micropatterned.


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