The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 1994
Filed:
Sep. 02, 1992
Akihiko Okubora, Kanagawa, JP;
Chiaki Takano, Kanagawa, JP;
Kiyoshi Tanaka, Kanagawa, JP;
Hideto Ishikawa, Kanagawa, JP;
Sony Corporation, Tokyo, JP;
Abstract
An optical-electronic integrated circuit device capable of three-dimensionally transmitting optical signals between plural semiconductor substrates on each of which an integrated circuit is previously formed. At least one of the light emitting elements and the light receiving elements are formed on the semiconductor substrate which transmits the light propagated between these elements. In this manner, signals may be transmitted in a direction perpendicular to the semiconductor substrate even without specifically processing the semiconductor substrate. Additionally, signal distortion, transmission losses, mutual intervention or delay are not incurred. For two-dimensionally connecting plural three-dimensionally integrated optical-electronic integrated circuit devices in a direction parallel to the semiconductor substrates, the circuit devices are arrayed on an optical interconnection base plate, and light signals are transmitted by means of a pair of inclined surfaces which are formed on the optical interconnection base plate and which are arranged facing the light emitting element and the light receiving element, and the light waveguide channels defined between these inclined surfaces. This drastically increases the operating speed of the circuit device and the integration degree.