The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 11, 1994

Filed:

Jan. 21, 1992
Applicant:
Inventors:

Satoru Torii, Kawasaki, JP;

Etsuo Ono, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395600 ; 371 671 ; 364D / ; 3642854 ; 3642592 ;
Abstract

An interface conformance verification system uses a computer to verify, e.g., the interface between modules in a large computer program or other a verification target. The interface conformance verification system includes an information collector and a verifier. The information collector receives at least one module group made up of one or more modules, collects as identification data pieces of target information on a predetermined operation, and creates sets, each having elements formed of the identification data. For example, the identification data may be a list of all variables declared, referenced or assigned a value in respective modules. Each set may correspond to a module or a plurality of modules. The verifier has a set operating mechanism and judging unit. The set operating mechanism receives at least two sets created by the information collector and performs a predetermined set operation, such as the difference between all variables referenced in one module and all variables having a value assigned in any other module. The judging unit outputs a set operation result showing a relation between corresponding operations judgment standards are used by the judging unit to determine whether to modules or other verification target conforms to predetermined interface rules or other requirements.


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