Programmable synapse for neural network applications

Abstract

A synapse for neural network applications providing four quadrant feed-forward and feed-back modes in addition to an outer-product learning capability allowing learning in-situ. The invention, in its preferred embodiment, utilizes a novel two-transistor implementation which permits each synapse to be built in an integrated circuit chip surface area of only 20 by 20 micrometers. One of the two transistors at each synapse of the present invention comprises a floating gate structure composed of a floating gate electrode and a control electrode which permits learning upon application of incident ultraviolet light. During ultraviolet light application, a floating gate electrode voltage may be altered to modify the weight of each synapse in accordance with preselected criteria, based upon the input and output weight change vector elements corresponding to that particular matrix element. The second transistor corresponding to each synapse of the present invention provides a novel method for applying a voltage to the control electrode of the aforementioned floating gate structure of the first transistor. The voltage applied to the control electrode and thus the proportionate change in the floating gate electrode of the first transistor may be made proportional to the product of the corresponding input weight change vector element and the corresponding output weight change vector element, by using slope controllable ramp generators and phase controllable pulse generators, only one set of which must be provided for the entire matrix of synapses herein disclosed.