The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 04, 1994
Filed:
Mar. 26, 1992
Toru Sudoh, Sendai, JP;
Mikio Takano, Ohme, JP;
Kokusai Electric Co., Ltd., Tokyo, JP;
Goyo Electronics Co., Ltd., Tokyo, JP;
Abstract
A single or a plurality of semiconductor chips or thin film elements which are bare or passivated to a minimum extent are housed in an enclosure member formed by drawing into the shape of a tray from a laminate consisting of an insulation layer and a first and second conductive layers formed on opposite sides, respectively, of the insulation layer. The enclosure member has a concavity having a substantially flat bottom and circumferential edge. There are provided on the inner surface of the concavity as extended to the circumferential edge, wiring conductors which are destined for connecting the terminal electrodes of the semiconductor chip or the like to the terminal electrodes corresponding to electronic parts on a circuit board, while the outer surface of the concavity is held at the ground potential to form an electromagnetic shield. The semiconductor chip or the like is connected to one end of the wiring conductor by the wire bonding process and resin-molded in the concavity. Since the semiconductor chip or the like is resin-molded in the enclosure member having the electromagnetic shield formed integrally therewith and the wiring conductors are extended to the substantially flat circumferential edge, a leadless package is formed which can be surface-mounted on a circuit board with the face thereof down.