The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 1994

Filed:

Jul. 16, 1992
Applicant:
Inventors:

Sheau-Dong Wu, Saratoga, CA (US);

Hiro Yoshida, Santa Clara, CA (US);

Assignee:

Mosel-Vitelic, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395800 ; 3642443 ; 3649654 ;
Abstract

A bidirectional first-in first-out buffer device including on a single chip a single bank FIFO memory array, two bidirectional input/output ports, an input multiplexer for selecting which port to input data from, an output multiplexer for selecting which port to output data to, a byte/word converter for converting input data from a byte format to a word format, a word/byte converter for converting output data from a word format to a byte format, a parity generator/checker for generating parity output signals or confirming parity input signals, a flag generator for generating empty/full and half full flags, and control logic for controlling the direction, format and timing of data flow. The device is packaged in a 52-pin plastic leaded chip carrier package.


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