The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 20, 1994
Filed:
Aug. 20, 1991
Sunil V Ashtaputre, San Jose, CA (US);
Dale M Wong, San Francisco, CA (US);
VLSI Technology, Inc., San Jose, CA (US);
Abstract
In a method for placement of components for a VLSI circuit, an initial number of current placements are selected. A greedy optimization is partially performed on each of the current placements. Then, a subset of the current placements which have been partially optimized is selected to be the new current placements. This selection is based on a global cost metric for the current placements. The global cost metric is, for example, based on the total length of all connection line networks for the circuit. The partial optimization and selection are repeated until there is only one current placement. Then, an optimization is performed on the remaining placement to obtain an optimized placement. The optimization is, for example, a completion of the partially performed greedy optimization.