The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 1994

Filed:

Jun. 14, 1993
Applicant:
Inventors:

Nobuyuki Yasuda, Kanagawa, JP;

Toshio Tamura, Kanagawa, JP;

Hiroshi Toi, Kanagawa, JP;

Akio Mishima, Kanagawa, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01K / ;
U.S. Cl.
CPC ...
29852 ; 29846 ; 174255 ; 174261 ; 427 97 ; 437217 ;
Abstract

A multilayer wiring board and a method for manufacturing the same are disclosed. The wiring board comprises an insulating substrate having a first and second conductor layers formed on major surfaces of the insulating substrate, a blind hole formed through the first conductor layer and the insulating substrate to expose the second conductor layer at the bottom of the blind hole, and a connecting conductor provided to cover the exposed surface of the second conductor layer wall portion of the blind hole and the first conductor layer. Since the connecting conductor and the second conductor are made in surface contact, connection reliability is very much improved. The blind hole is made by blasting a fine abrasive powder beam to selectively remove the insulating substrate. The end of selective removal can be easily controlled by the difference of working speed against the insulating substrate and the conductor layer to successfully expose the second conductor layer at the bottom of the blind hole.


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