The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 13, 1994
Filed:
Aug. 15, 1991
Steven C Taylor, Hillsborough, CA (US);
Verilink Corporation, San Jose, CA (US);
Abstract
A retrofit circuit for communication one of three conditions from a line interface unit (LIU) to a receiver unit (RU), using only one external connection between the LIU and the RU. The LIU has a detection circuit and two resistors. The RU has a voltage comparator. The detection circuit outputs a first input signal in response to a signal having ESF and no yellow alarm, a second input signal in response to a signal having ESF and yellow alarm, a third input signal in response to a signal having SF with no yellow alarm, and a fourth input signal in response to a signal having SF with yellow alarm. The resistors output to the external connection a first voltage level in response to the first and third input signals, a second voltage level in response to the second and third input signals, and a third voltage level in response to the second and fourth input signals. The voltage comparator outputs a first output signal and a third output signal in response to detecting the first voltage level at the external connection, a second output signal and a third output signal in response to detecting the second voltage level at the external connection, and a second output signal and a fourth output signal in response to detecting the third voltage level at the external connection.