The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 1994

Filed:

Jul. 12, 1991
Applicant:
Inventor:

Hisakazu Ohmori, Tokyo, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
371 205 ; 371 204 ; 371 206 ; 371 24 ; 371 251 ;
Abstract

A method for detecting a PN (Pseudo Noise) pattern for a remote loopback test in a communication system includes the following first through fifth steps. The first step receives a first n-bit pattern (n is an arbitrary number) which is a part of the PN pattern. The second step leftwardly shifts n bits of the first n-bit pattern by a first number of bits, so that a second n-bit pattern is generated. The third step executes an exclusive-OR operation on the n bits of the first n-bit pattern and n bits of the second n-bit pattern, so that a third n-bit pattern is generated. The fourth step rightwardly shifts n bits of the third n-bit pattern by a second number of bits, so that a fourth n-bit pattern is generated. The fifth step executes an exclusive-OR operation on the n bits of the third n-bit patterns and n bits of the fourth n-bit patterns, so that a fifth n-bit pattern is generated. The fifth n-bit pattern is a sixth n-bit pattern which is received after the first n-bit pattern. The first through fifth are repeatedly carried out each time n bits of the first n-bit pattern are received at the first step until a pattern detection signal is generated to activate the loopback test procedure when the fifth n-bit pattern and the sixth n-bit pattern become identical for a number of times.


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