The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 1994

Filed:

May. 31, 1991
Applicant:
Inventors:

Tim P Dao, Coppell, TX (US);

Frank J Svejda, Dallas, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518905 ; 36518911 ;
Abstract

A BICMOS latch driver L/D is used to implement a BICMOS gate array memory cell (FIG. 2b). The memory cell includes a latch formed by cross-coupled invertors (INV1 and INV2). The driver stage is formed by an NPN transistor Q0 and an n-channel transistor MN3. The relatively stronger bipolar transistor is used to pull the output of the BICMOS latch/driver HI, while, for most applications, the relatively weaker n-channel device has sufficient strength to pull the output low. A WRITE port (WP) that interfaces to the WRITE bitline, and a READ port (RP) that interfaces to the READ bitline.


Find Patent Forward Citations

Dao, Tim. (1994). Bicmos latch/driver circuit, such as for a gate array memory cell (U.S. Patent No. 5347487). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5347487

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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