The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 1994

Filed:

Mar. 30, 1993
Applicant:
Inventors:

Mitsuru Nagata, Yokohama, JP;

Koichiro Sato, Yokohama, JP;

Tsunetaka Matsuo, Kawasaki, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
341 76 ; 341 77 ;
Abstract

A counter counts a clock signal. A multiplexer sequentially inputs digital input signals each having a plurality of bits in accordance with an output signal from the counter. A subtracter subtracts a quantized output signal delayed by an n-clock delay element from the input signal. An integrator integrates an output signal from the subtracter. The quantizer quantizes an output from the integrator. The n-clock delay element delays the output signal from the quantizer by n clocks and supplies the delayed signal to the subtracter. A demultiplexer sequentially outputs output signals from the quantizer in accordance with the output signal from the counter. This demultiplexer outputs signals in the input order of the multiplexer.


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