The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 30, 1994
Filed:
May. 19, 1992
Applicant:
Inventors:
Craig A Heikes, Ft. Collins, CO (US);
Robert H Miller, Jr, Loveland, CO (US);
Assignee:
Hewlett-Packard Company, Palo Alto, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307480 ; 307443 ; 307268 ;
Abstract
The present invention tolerates the decay of a dynamic logic circuit by preserving the logic state of the output before the decay. A slow clock detector is configured to detect a slow clock condition of the clock pertaining to the dynamic logic circuit. A tolerant storage device is configured to preserve the data output by command of the slow clock detector upon a detection of the slow clock condition.