The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 30, 1994
Filed:
Jan. 13, 1993
Thai M Nguyen, Santa Clara, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A low noise logic amplifier with an input signal converter and a differential logic amplifier which together receive and convert a nondifferential input logic signal to a differential output logic signal. The input signal converter receives the nondifferential logic signal and converts it to a differential input logic signal for the differential logic amplifier. The differential logic amplifier has two output signal current paths for its bias current. The input signal converter provides the differential input logic signal with a delay between its two differential logic phases such that at least one of the two output signal current paths in the differential logic amplifier is continuously conducting the bias current. Thus, during generation of the differential output logic signal, regardless of whether the differential input logic signal is experiencing a high-to-low or low-to-high logic transition, the differential logic amplifier bias current flows continuously and without interruption, thereby minimizing generation of noise spikes from abrupt changes in bias current flow.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile