The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 1994

Filed:

Mar. 18, 1988
Applicant:
Inventors:

Leland J Spangler, Ann Arbor, MI (US);

Kensall D Wise, Ann Arbor, MI (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257350 ; 257352 ; 257418 ;
Abstract

Integrated semiconductor-on-insulator (SOI) sensors and circuits which are electrostatically bonded to a support substrate, such as glass or an oxidized silicon wafer, are disclosed. The SOI sensors and SOI circuits are both formed using a novel fabrication process which allows multiple preformed and pretested integrated circuits on a silicon wafer to be electrostatically bonded to the support substrate without exposing the sensitive active regions of the electronic devices therein to a damaging electric field. The process includes forming a composite bonding structure on top of the integrated circuits prior to the bonding step. This composite structure includes a conductive layer dielectrically isolated from the circuit devices and electrically connected to the silicon wafer, which is spaced form but laterally overlaps at least the active semiconductive regions of the circuit devices. The SOI sensors each include a transducer and at least one active electronic device, which are both made at least in part from a common layer of lightly-doped single-crystal semiconductor material grown on the silicon wafer. After the bonding step, the bulk of the single-crystal wafer is removed, leaving the epitaxial layer containing the circuits and transducers. The epitaxial layer is then patterned into isolated mesas to dielectrically isolate the electronic devices. This patterning step also exposes bond pads, allowing external connections to be readily made to the sensors and circuits. Exemplary solid-state sensors disclosed herein include a capacitive accelerometer and pressure sensor.


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