The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 23, 1994
Filed:
Feb. 10, 1993
William C Madden, Lexington, MA (US);
Vidya Rajagopalan, Hudson, MA (US);
Sridhar Samudrala, Westboro, MA (US);
Digital Equipment Corporation, Maynard, MA (US);
Abstract
A floating point multiply of two n-bit operands creams a 2n-bit result, but ordinarily only n-bit precision is needed, so rounding is performed. Some rounding algorithms require the knowledge of the presence of any '1' in the n-2 low-order bits of the 2n-bit result. The presence of such a '1', indicates the so-called 'sticky bit' is set. The sticky bit is calculated in a path separate from the multiply operation, so the n-2 least significant sums need not be calculated. This saves time and circuitry in an array multiplier, for example. In an example method, the difference between n and the number of trailing zeros, 'x', in one of the n-bit operands is detected, by transposing the operand and detecting the leading one. The other operand is right-shifted by a number of bit positions equal to this difference. A sticky bit is generated if any logic '1's' are in the low-order n-x-2 bits fight shifted out of the second operand.