The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 23, 1994
Filed:
Nov. 25, 1992
Hiten S Randhawa, Santa Clara, CA (US);
Cheng-Yuan M Wang, San Jose, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
A system and method for selectively inverting a clock signal. Clock (CLK) and inverted clock (NCLK) signals are generated. A control signal (RCTL) and inverted control signal (NRCTL) operate the clock invert circuit (201). First (C1) and second (C2) output lines are coupled to both of the clock and inverted clock signals, but are selectively connected to one of such signals by way of the control and inverted control signals. According to a preferred aspect of the invention, the control signals are generated with an SRAM bit (207). The clock and inverted clock signals are used in, for example, a programmable logic device such as with a flip-flop (205) clock input.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile